--lpm_compare CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone IV E" LPM_WIDTH=6 ONE_INPUT_IS_CONSTANT="YES" aeb dataa datab
--VERSION_BEGIN 18.1 cbx_cycloneii 2018:09:12:13:04:24:SJ cbx_lpm_add_sub 2018:09:12:13:04:24:SJ cbx_lpm_compare 2018:09:12:13:04:24:SJ cbx_mgl 2018:09:12:13:10:36:SJ cbx_nadder 2018:09:12:13:04:24:SJ cbx_stratix 2018:09:12:13:04:24:SJ cbx_stratixii 2018:09:12:13:04:24:SJ  VERSION_END


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--synthesis_resources = 
SUBDESIGN cmpr_sgc
( 
	aeb	:	output;
	dataa[5..0]	:	input;
	datab[5..0]	:	input;
) 
VARIABLE 
	aeb_result_wire[0..0]	: WIRE;
	aneb_result_wire[0..0]	: WIRE;
	data_wire[14..0]	: WIRE;
	eq_wire	: WIRE;

BEGIN 
	aeb = eq_wire;
	aeb_result_wire[] = (! aneb_result_wire[]);
	aneb_result_wire[] = ((data_wire[0..0] # data_wire[1..1]) # data_wire[2..2]);
	data_wire[] = ( datab[5..5], dataa[5..5], datab[4..4], dataa[4..4], datab[3..3], dataa[3..3], datab[2..2], dataa[2..2], datab[1..1], dataa[1..1], datab[0..0], dataa[0..0], ((data_wire[11..11] $ data_wire[12..12]) # (data_wire[13..13] $ data_wire[14..14])), ((data_wire[7..7] $ data_wire[8..8]) # (data_wire[9..9] $ data_wire[10..10])), ((data_wire[3..3] $ data_wire[4..4]) # (data_wire[5..5] $ data_wire[6..6])));
	eq_wire = aeb_result_wire[];
END;
--VALID FILE