diff --git a/doc/~$$配置51寄存器波形图.~vsdx b/doc/~$$配置0x43波形图.~vsdx similarity index 98% rename from doc/~$$配置51寄存器波形图.~vsdx rename to doc/~$$配置0x43波形图.~vsdx index a2fc8ae..da9c7ed 100644 Binary files a/doc/~$$配置51寄存器波形图.~vsdx and b/doc/~$$配置0x43波形图.~vsdx differ diff --git a/doc/配置0x43波形图.vsdx b/doc/配置0x43波形图.vsdx new file mode 100644 index 0000000..cd11cc7 Binary files /dev/null and b/doc/配置0x43波形图.vsdx differ diff --git a/doc/配置0x43状态机.vsdx b/doc/配置0x43状态机.vsdx new file mode 100644 index 0000000..ce413dd Binary files /dev/null and b/doc/配置0x43状态机.vsdx differ diff --git a/doc/配置51寄存器波形图.vsdx b/doc/配置51寄存器波形图.vsdx index f095b90..03e5269 100644 Binary files a/doc/配置51寄存器波形图.vsdx and b/doc/配置51寄存器波形图.vsdx differ diff --git a/rtl/i2c_ctrl.v b/rtl/i2c_ctrl.v index 3591955..727cf00 100644 --- a/rtl/i2c_ctrl.v +++ b/rtl/i2c_ctrl.v @@ -38,11 +38,12 @@ reg [4: 0] cnt_clk; //中间信号定义 reg [9: 0] cnt_wait ;//1000us -reg skip_en_1 ;//步骤1跳转信号 -reg skip_en_2 ;//步骤2跳转信号 -reg skip_en_3 ;//步骤3跳转信号 -reg skip_en_4 ;//步骤4跳转信号 -reg skip_en_5 ;//步骤5跳转信号 +reg skip_en_1 ;//步骤1跳转信号,唤醒 +reg skip_en_2 ;//步骤2跳转信号,激活bank0 +reg skip_en_3 ;//步骤3跳转信号,配置0x00 +reg skip_en_4 ;//步骤4跳转信号,读取0x20 +reg skip_en_5 ;//步骤5跳转信号,配置51寄存器 +reg skip_en_6 ;//步骤6跳转信号,配置0x43 reg [1: 0] cnt_i2c_clk ;//i2c计数器 reg [2: 0] cnt_bit ;//bit计数器 reg i2c_end ;//i2c结束信号 @@ -106,13 +107,13 @@ end //状态机第二段 always @(*)begin case(state_c) - IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin + IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = START; end else begin state_n = IDLE; end - START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin + START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = SLAVE_ADDR; end else begin @@ -121,13 +122,13 @@ always @(*)begin SLAVE_ADDR: if(skip_en_1 == 1'b1)begin state_n = WAIT; end - else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin + else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = ACK_1; end else begin state_n = SLAVE_ADDR; end - ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1))begin + ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = DEVICE_ADDR; end else if(skip_en_4 == 1'b1)begin @@ -136,7 +137,7 @@ always @(*)begin else begin state_n = ACK_1; end - DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1))begin + DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = ACK_2; end else begin @@ -145,7 +146,7 @@ always @(*)begin ACK_2: if((skip_en_2 == 1'b1) || (skip_en_5 == 1'b1))begin state_n = DATA; end - else if(skip_en_3 == 1'b1)begin + else if((skip_en_3 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = STOP; end else begin @@ -181,7 +182,7 @@ always @(*)begin else begin state_n = WAIT; end - STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin + STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin state_n = IDLE; end else begin @@ -201,6 +202,7 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin skip_en_3 <= 1'b0;//步骤3跳转信号 skip_en_4 <= 1'b0;//步骤4跳转信号 skip_en_5 <= 1'b0;//步骤5跳转信号 + skip_en_6 <= 1'b0;//步骤6跳转信号 step <= 3'd0; err_en <= 1'b0; cnt_i2c_clk <= 2'd0; @@ -245,7 +247,13 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin end else begin skip_en_5 <= 1'b0; + end + if((cnt_wait == MAX - 2'd2) && (step == 3'd5))begin + skip_en_6 <= 1'b1; end + else begin + skip_en_6 <= 1'b0; + end end START: begin cnt_i2c_clk <= cnt_i2c_clk + 1'd1; @@ -279,6 +287,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end end SLAVE_ADDR: begin cnt_i2c_clk <= cnt_i2c_clk + 1'd1; @@ -312,6 +326,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd5) && (cnt_bit == 3'd7))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end if((cnt_bit == 3'd7) && (cnt_i2c_clk == 2'd3))begin cnt_bit <= 3'd0; end @@ -348,6 +368,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end end DEVICE_ADDR:begin cnt_i2c_clk <= cnt_i2c_clk + 1'b1; @@ -378,6 +404,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd5))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end end ACK_2: begin cnt_i2c_clk <= cnt_i2c_clk + 1; @@ -399,6 +431,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end end DATA: begin cnt_i2c_clk <= cnt_i2c_clk + 1'b1; @@ -512,13 +550,19 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_5 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin + skip_en_6 <= 1'b1; + end + else begin + skip_en_6 <= 1'b0; + end if(cnt_i2c_clk == 2'd2)begin i2c_end <= 1'b1; end else begin i2c_end <= 1'b0; end - if((i2c_end == 1'b1) && (step <= 3'd3))begin + if((i2c_end == 1'b1) && ((step <= 3'd3) || step == 3'd5))begin step <= step + 1'd1; end else if((i2c_end == 1'b1) && (step == 3'd4) && (cfg_num == 6'd51))begin @@ -535,6 +579,7 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin skip_en_3 <= 1'b0; skip_en_4 <= 1'b0; skip_en_5 <= 1'b0; + skip_en_6 <= 1'b0; err_en <= 1'b0; step <= step; cnt_i2c_clk <= 2'd0; @@ -599,6 +644,11 @@ always @(*)begin device_addr= cfg_data[15: 8]; wr_data = cfg_data[7: 0]; end + 3'd5: begin + slave_addr = {SLAVE_ID, 1'b0};//配置 + device_addr= 8'h43; + wr_data = 8'h00; + end default:begin slave_addr = 8'h0; device_addr = 8'h0;