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@ -38,11 +38,12 @@ reg [4: 0] cnt_clk;
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//中间信号定义
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reg [9: 0] cnt_wait ;//1000us
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reg skip_en_1 ;//步骤1跳转信号
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reg skip_en_2 ;//步骤2跳转信号
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reg skip_en_3 ;//步骤3跳转信号
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reg skip_en_4 ;//步骤4跳转信号
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reg skip_en_5 ;//步骤5跳转信号
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reg skip_en_1 ;//步骤1跳转信号,唤醒
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reg skip_en_2 ;//步骤2跳转信号,激活bank0
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reg skip_en_3 ;//步骤3跳转信号,配置0x00
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reg skip_en_4 ;//步骤4跳转信号,读取0x20
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reg skip_en_5 ;//步骤5跳转信号,配置51寄存器
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reg skip_en_6 ;//步骤6跳转信号,配置0x43
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reg [1: 0] cnt_i2c_clk ;//i2c计数器
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reg [2: 0] cnt_bit ;//bit计数器
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reg i2c_end ;//i2c结束信号
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@ -106,13 +107,13 @@ end
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//状态机第二段
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always @(*)begin
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case(state_c)
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IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin
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IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = START;
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end
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else begin
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state_n = IDLE;
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end
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START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin
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START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = SLAVE_ADDR;
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end
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else begin
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@ -121,13 +122,13 @@ always @(*)begin
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SLAVE_ADDR: if(skip_en_1 == 1'b1)begin
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state_n = WAIT;
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end
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else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin
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else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = ACK_1;
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end
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else begin
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state_n = SLAVE_ADDR;
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end
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ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1))begin
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ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = DEVICE_ADDR;
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end
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else if(skip_en_4 == 1'b1)begin
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@ -136,7 +137,7 @@ always @(*)begin
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else begin
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state_n = ACK_1;
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end
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DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1))begin
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DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = ACK_2;
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end
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else begin
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@ -145,7 +146,7 @@ always @(*)begin
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ACK_2: if((skip_en_2 == 1'b1) || (skip_en_5 == 1'b1))begin
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state_n = DATA;
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end
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else if(skip_en_3 == 1'b1)begin
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else if((skip_en_3 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = STOP;
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end
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else begin
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@ -181,7 +182,7 @@ always @(*)begin
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else begin
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state_n = WAIT;
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end
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STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1))begin
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STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin
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state_n = IDLE;
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end
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else begin
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@ -201,6 +202,7 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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skip_en_3 <= 1'b0;//步骤3跳转信号
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skip_en_4 <= 1'b0;//步骤4跳转信号
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skip_en_5 <= 1'b0;//步骤5跳转信号
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skip_en_6 <= 1'b0;//步骤6跳转信号
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step <= 3'd0;
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err_en <= 1'b0;
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cnt_i2c_clk <= 2'd0;
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@ -246,6 +248,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((cnt_wait == MAX - 2'd2) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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end
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START: begin
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cnt_i2c_clk <= cnt_i2c_clk + 1'd1;
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@ -279,6 +287,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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end
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SLAVE_ADDR: begin
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cnt_i2c_clk <= cnt_i2c_clk + 1'd1;
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@ -312,6 +326,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((cnt_i2c_clk == 2'd2) && (step == 3'd5) && (cnt_bit == 3'd7))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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if((cnt_bit == 3'd7) && (cnt_i2c_clk == 2'd3))begin
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cnt_bit <= 3'd0;
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end
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@ -348,6 +368,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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end
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DEVICE_ADDR:begin
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cnt_i2c_clk <= cnt_i2c_clk + 1'b1;
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@ -378,6 +404,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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end
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ACK_2: begin
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cnt_i2c_clk <= cnt_i2c_clk + 1;
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@ -399,6 +431,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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end
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DATA: begin
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cnt_i2c_clk <= cnt_i2c_clk + 1'b1;
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@ -512,13 +550,19 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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else begin
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skip_en_5 <= 1'b0;
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end
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if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin
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skip_en_6 <= 1'b1;
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end
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else begin
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skip_en_6 <= 1'b0;
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end
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if(cnt_i2c_clk == 2'd2)begin
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i2c_end <= 1'b1;
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end
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else begin
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i2c_end <= 1'b0;
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end
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if((i2c_end == 1'b1) && (step <= 3'd3))begin
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if((i2c_end == 1'b1) && ((step <= 3'd3) || step == 3'd5))begin
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step <= step + 1'd1;
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end
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else if((i2c_end == 1'b1) && (step == 3'd4) && (cfg_num == 6'd51))begin
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@ -535,6 +579,7 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin
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skip_en_3 <= 1'b0;
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skip_en_4 <= 1'b0;
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skip_en_5 <= 1'b0;
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skip_en_6 <= 1'b0;
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err_en <= 1'b0;
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step <= step;
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cnt_i2c_clk <= 2'd0;
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@ -599,6 +644,11 @@ always @(*)begin
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device_addr= cfg_data[15: 8];
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wr_data = cfg_data[7: 0];
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end
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3'd5: begin
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slave_addr = {SLAVE_ID, 1'b0};//配置
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device_addr= 8'h43;
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wr_data = 8'h00;
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end
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default:begin
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slave_addr = 8'h0;
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device_addr = 8'h0;
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