diff --git a/doc/~$$配置0x00波形图.~vsdx b/doc/~$$配置0x00波形图.~vsdx new file mode 100644 index 0000000..c771ab5 Binary files /dev/null and b/doc/~$$配置0x00波形图.~vsdx differ diff --git a/doc/唤醒操作.vsdx b/doc/唤醒操作波形图.vsdx similarity index 100% rename from doc/唤醒操作.vsdx rename to doc/唤醒操作波形图.vsdx diff --git a/doc/状态机.vsdx b/doc/唤醒状态机.vsdx similarity index 100% rename from doc/状态机.vsdx rename to doc/唤醒状态机.vsdx diff --git a/doc/激活bank0状态机.vsdx b/doc/激活bank0状态机.vsdx new file mode 100644 index 0000000..28a1eb5 Binary files /dev/null and b/doc/激活bank0状态机.vsdx differ diff --git a/doc/配置0x00波形图.vsdx b/doc/配置0x00波形图.vsdx new file mode 100644 index 0000000..a2014d1 Binary files /dev/null and b/doc/配置0x00波形图.vsdx differ diff --git a/doc/配置0x00状态机.vsdx b/doc/配置0x00状态机.vsdx new file mode 100644 index 0000000..653879b Binary files /dev/null and b/doc/配置0x00状态机.vsdx differ diff --git a/rtl/i2c_ctrl.v b/rtl/i2c_ctrl.v index d82c800..976f5c1 100644 --- a/rtl/i2c_ctrl.v +++ b/rtl/i2c_ctrl.v @@ -33,6 +33,7 @@ reg i2c_clk; reg [9: 0] cnt_wait ;//1000us reg skip_en_1 ;//步骤1跳转信号 reg skip_en_2 ;//步骤2跳转信号 +reg skip_en_3 ;//步骤3跳转信号 reg [2: 0] step ;//步骤 reg [1: 0] cnt_i2c_clk ;//i2c计数器 reg [2: 0] cnt_bit ;//bit计数器 @@ -86,13 +87,13 @@ end //状态机第二段 always @(*)begin case(state_c) - IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1))begin + IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = START; end else begin state_n = IDLE; end - START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1))begin + START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = SLAVE_ADDR; end else begin @@ -101,19 +102,19 @@ always @(*)begin SLAVE_ADDR: if(skip_en_1 == 1'b1)begin state_n = WAIT; end - else if(skip_en_2 == 1'b1)begin + else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = ACK_1; end else begin state_n = SLAVE_ADDR; end - ACK_1: if(skip_en_2 == 1'b1)begin + ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = DEVICE_ADDR; end else begin state_n = ACK_1; end - DEVICE_ADDR:if(skip_en_2 == 1'b1)begin + DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = ACK_2; end else begin @@ -122,6 +123,9 @@ always @(*)begin ACK_2: if(skip_en_2 == 1'b1)begin state_n = DATA; end + else if(skip_en_3 == 1'b1)begin + state_n = STOP; + end else begin state_n = ACK_2; end @@ -143,7 +147,7 @@ always @(*)begin else begin state_n = WAIT; end - STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1))begin + STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1))begin state_n = IDLE; end else begin @@ -158,8 +162,9 @@ end always @(posedge i2c_clk or negedge sys_rst_n)begin if(!sys_rst_n)begin cnt_wait <= 10'd0; - skip_en_1 <= 1'b0; + skip_en_1 <= 1'b0;//步骤1跳转信号 skip_en_2 <= 1'b0;//步骤2跳转信号 + skip_en_3 <= 1'b0;//步骤3跳转信号 step <= 3'd0; cnt_i2c_clk <= 2'd0; cnt_bit <= 3'd0; @@ -186,6 +191,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((cnt_wait == MAX - 2'd2) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end end START: begin cnt_i2c_clk <= cnt_i2c_clk + 1'd1; @@ -201,6 +212,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end end SLAVE_ADDR: begin cnt_i2c_clk <= cnt_i2c_clk + 1'd1; @@ -216,6 +233,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd2) && (cnt_bit == 3'd7))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end if((cnt_bit == 3'd7) && (cnt_i2c_clk == 2'd3))begin cnt_bit <= 3'd0; end @@ -234,6 +257,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end end DEVICE_ADDR:begin cnt_i2c_clk <= cnt_i2c_clk + 1'b1; @@ -252,6 +281,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end end ACK_2: begin cnt_i2c_clk <= cnt_i2c_clk + 1; @@ -261,6 +296,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end end DATA: begin cnt_i2c_clk <= cnt_i2c_clk + 1'b1; @@ -317,6 +358,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin else begin skip_en_2 <= 1'b0; end + if((cnt_i2c_clk == 2'd2) && (step == 3'd2))begin + skip_en_3 <= 1'b1; + end + else begin + skip_en_3 <= 1'b0; + end if(cnt_i2c_clk == 2'd2)begin i2c_end <= 1'b1; end @@ -334,6 +381,7 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin cnt_wait <= 10'd0; skip_en_1 <= 1'b0; skip_en_2 <= 1'b0; + skip_en_3 <= 1'b0; step <= step; cnt_i2c_clk <= 2'd0; cnt_bit <= 3'd0; @@ -362,6 +410,11 @@ always @(*)begin device_addr= {8'hef}; wr_data = {8'h00}; end + 3'd2: begin + slave_addr = {SLAVE_ID, 1'b0}; + device_addr= {8'hef}; + wr_data = {8'h00}; + end default:begin slave_addr = 8'h0; device_addr = 8'h0;