From b31bda8983231dbc761a4ea54c9d0eeecc4ac200 Mon Sep 17 00:00:00 2001 From: lincaigui <18166451309@163.com> Date: Fri, 3 May 2024 17:30:12 +0800 Subject: [PATCH] modify i2c_ctrl.v --- rtl/i2c_ctrl.v | 620 ++++++++++++++----------------------------------- 1 file changed, 175 insertions(+), 445 deletions(-) diff --git a/rtl/i2c_ctrl.v b/rtl/i2c_ctrl.v index 922c468..f98048c 100644 --- a/rtl/i2c_ctrl.v +++ b/rtl/i2c_ctrl.v @@ -39,13 +39,14 @@ reg [4: 0] cnt_clk; //中间信号定义 reg [9: 0] cnt_wait ;//1000us -reg skip_en_1 ;//步骤1跳转信号,唤醒 -reg skip_en_2 ;//步骤2跳转信号,激活bank0 -reg skip_en_3 ;//步骤3跳转信号,配置0x00 -reg skip_en_4 ;//步骤4跳转信号,读取0x20 -reg skip_en_5 ;//步骤5跳转信号,配置51寄存器 -reg skip_en_6 ;//步骤6跳转信号,配置0x43 -reg skip_en_7 ;//步骤7跳转信号,读取0x43 +// reg skip_en_1 ;//步骤1跳转信号,唤醒 +// reg skip_en_2 ;//步骤2跳转信号,激活bank0 +// reg skip_en_3 ;//步骤3跳转信号,配置0x00 +// reg skip_en_4 ;//步骤4跳转信号,读取0x20 +// reg skip_en_5 ;//步骤5跳转信号,配置51寄存器 +// reg skip_en_6 ;//步骤6跳转信号,配置0x43 +// reg skip_en_7 ;//步骤7跳转信号,读取0x43 +reg skip_en ; reg [1: 0] cnt_i2c_clk ;//i2c计数器 reg [2: 0] cnt_bit ;//bit计数器 reg i2c_end ;//i2c结束信号 @@ -96,6 +97,84 @@ always @(posedge sys_clk or negedge sys_rst_n) begin i2c_clk <= i2c_clk; end end +//step +always @(*)begin + case(step) + 3'd0: begin + slave_addr = {SLAVE_ID, 1'b0}; + device_addr = 8'h0; + wr_data = 8'h0; + end + 3'd1: begin + slave_addr = {SLAVE_ID, 1'b0}; + device_addr= {8'hef}; + wr_data = {8'h00}; + end + 3'd2: begin + slave_addr = {SLAVE_ID, 1'b0}; + device_addr= {8'h00}; + wr_data = {8'h00}; + end + 3'd3: begin + slave_addr = {SLAVE_ID, 1'b1};//读取 + device_addr= {8'h00}; + wr_data = {8'h00}; + end + 3'd4: begin + slave_addr = {SLAVE_ID, 1'b0}; + device_addr= cfg_data[15: 8]; + wr_data = cfg_data[7: 0]; + end + 3'd5: begin + slave_addr = {SLAVE_ID, 1'b0};//配置 + device_addr= 8'h43; + wr_data = 8'h00; + end + 3'd6: begin + slave_addr = {SLAVE_ID, 1'b1};//读取 + device_addr= 8'h43; + wr_data = 8'h00; + end + default:begin + slave_addr = 8'h0; + device_addr = 8'h0; + wr_data = 8'h0; + end + endcase +end +always @(posedge i2c_clk or negedge sys_rst_n)begin + if(!sys_rst_n)begin + cnt_i2c_clk <= 2'd0; + cnt_bit <= 3'd0; + cnt_wait <= 10'd0; + end + else begin + case(state_c) + IDLE, WAIT: if(cnt_wait >= MAX - 1'd1)begin + cnt_wait <= 10'd0; + end + else begin + cnt_wait <= cnt_wait + 1'd1; + end + START, STOP, ACK_1, ACK_2, ACK_3, NACK: + cnt_i2c_clk <= cnt_i2c_clk + 1'd1; + SLAVE_ADDR, DEVICE_ADDR, DATA: begin + cnt_i2c_clk <= cnt_i2c_clk + 1'd1; + if((cnt_i2c_clk == 2'd3))begin + cnt_bit <= cnt_bit + 1'd1; + end + else begin + cnt_bit <= cnt_bit; + end + end + default:begin + cnt_i2c_clk <= 2'd0; + cnt_bit <= 3'd0; + cnt_wait <= 10'd0; + end + endcase + end +end ///////// //状态机，第一段 always @(posedge i2c_clk or negedge sys_rst_n) begin @@ -109,55 +188,86 @@ end //状态机第二段 always @(*)begin case(state_c) - IDLE: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1) || (skip_en_7 == 1'b1))begin + IDLE: if(((skip_en == 1'b1) && (step == 3'd0)) + || ((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = START; end else begin state_n = IDLE; end - START: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1) || (skip_en_7 == 1'b1))begin + START: if(((skip_en == 1'b1) && (step == 3'd0)) + || ((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = SLAVE_ADDR; end else begin state_n = START; end - SLAVE_ADDR: if(skip_en_1 == 1'b1)begin + SLAVE_ADDR: if(((skip_en == 1'b1) && (step == 3'd0)))begin state_n = WAIT; end - else if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1) || (skip_en_7 == 1'b1))begin + else if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = ACK_1; end else begin state_n = SLAVE_ADDR; end - ACK_1: if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin + ACK_1: if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)))begin state_n = DEVICE_ADDR; end - else if((skip_en_4 == 1'b1) || (skip_en_7 == 1'b1))begin + else if(((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = DATA; end else begin state_n = ACK_1; end - DEVICE_ADDR:if((skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1))begin + DEVICE_ADDR:if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = ACK_2; - end + end else begin state_n = DEVICE_ADDR; end - ACK_2: if((skip_en_2 == 1'b1) || (skip_en_5 == 1'b1))begin + ACK_2: if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd4)))begin state_n = DATA; - end - else if((skip_en_3 == 1'b1) || (skip_en_6 == 1'b1))begin + end + else if(((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd5)))begin state_n = STOP; - end + end else begin state_n = ACK_2; end - DATA: if((skip_en_2 == 1'b1) || (skip_en_5 == 1'b1))begin + + DATA: if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd4)))begin state_n = ACK_3; end - else if((skip_en_4 == 1'b1) || (skip_en_7 == 1'b1))begin + else if(((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = NACK; end else if(err_en == 1'b1)begin @@ -166,30 +276,39 @@ always @(*)begin else begin state_n = DATA; end - NACK: if((skip_en_4 == 1'b1) || (skip_en_7 == 1'b1))begin + NACK: if(((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = STOP; - end + end else begin state_n = NACK; - end - ACK_3: if((skip_en_2 == 1'b1) || (skip_en_5 == 1'b1))begin + end + ACK_3: if(((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd4)))begin state_n = STOP; end else begin state_n = ACK_3; end - WAIT: if(skip_en_1 == 1'b1)begin + WAIT: if(((skip_en == 1'b1) && (step == 3'd0)))begin state_n = STOP; end else begin state_n = WAIT; end - STOP: if((skip_en_1 == 1'b1) || (skip_en_2 == 1'b1) || (skip_en_3 == 1'b1) || (skip_en_4 == 1'b1) || (skip_en_5 == 1'b1) || (skip_en_6 == 1'b1) || (skip_en_7 == 1'b1))begin + STOP: if(((skip_en == 1'b1) && (step == 3'd0)) + || ((skip_en == 1'b1) && (step == 3'd1)) + || ((skip_en == 1'b1) && (step == 3'd2)) + || ((skip_en == 1'b1) && (step == 3'd3)) + || ((skip_en == 1'b1) && (step == 3'd4)) + || ((skip_en == 1'b1) && (step == 3'd5)) + || ((skip_en == 1'b1) && (step == 3'd6)))begin state_n = IDLE; - end + end else begin state_n = STOP; end + default: begin state_n = IDLE; end @@ -198,307 +317,53 @@ end //状态机第三段 always @(posedge i2c_clk or negedge sys_rst_n)begin if(!sys_rst_n)begin - cnt_wait <= 10'd0; - skip_en_1 <= 1'b0;//步骤1跳转信号 - skip_en_2 <= 1'b0;//步骤2跳转信号 - skip_en_3 <= 1'b0;//步骤3跳转信号 - skip_en_4 <= 1'b0;//步骤4跳转信号 - skip_en_5 <= 1'b0;//步骤5跳转信号 - skip_en_6 <= 1'b0;//步骤6跳转信号 - skip_en_7 <= 1'b0;//步骤7跳转信号 + skip_en <= 1'b0; step <= 3'd0; err_en <= 1'b0; - cnt_i2c_clk <= 2'd0; - cnt_bit <= 3'd0; i2c_end <= 1'b0; end else begin case(state_c) - IDLE: begin - if(cnt_wait == MAX - 1)begin - cnt_wait <= 10'd0; - end - else begin - cnt_wait <= cnt_wait + 1; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd0))begin - skip_en_1 <= 1'b1; - end - else begin - skip_en_1 <= 1'b0; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd3))begin - skip_en_4 <= 1'b1; + IDLE, WAIT: begin + if((cnt_wait == MAX - 2'd2))begin + skip_en <= 1'b1; end else begin - skip_en_4 <= 1'b0; + skip_en <= 1'b0; end - if((cnt_wait == MAX - 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd6))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; - end end START: begin - cnt_i2c_clk <= cnt_i2c_clk + 1'd1; - if((cnt_i2c_clk == 2'd2) && (step == 3'd0))begin - skip_en_1 <= 1'b1; - end - else begin - skip_en_1 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd3))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd6))begin - skip_en_7 <= 1'b1; + if(cnt_i2c_clk == 2'd2)begin + skip_en <= 1'b1; end else begin - skip_en_7 <= 1'b0; + skip_en <= 1'b0; end end - SLAVE_ADDR: begin - cnt_i2c_clk <= cnt_i2c_clk + 1'd1; - if((cnt_i2c_clk == 2'd2) && (step == 3'd0) && (cnt_bit == 3'd7))begin - skip_en_1 <= 1'b1; - end - else begin - skip_en_1 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd1) && (cnt_bit == 3'd7))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd2) && (cnt_bit == 3'd7))begin - skip_en_3 <= 1'b1; + SLAVE_ADDR, DEVICE_ADDR: + begin + if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7))begin + skip_en <= 1'b1; end else begin - skip_en_3 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd3) && (cnt_bit == 3'd7))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd4) && (cnt_bit == 3'd7))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd5) && (cnt_bit == 3'd7))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd6) && (cnt_bit == 3'd7))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; - end - if((cnt_bit == 3'd7) && (cnt_i2c_clk == 2'd3))begin - cnt_bit <= 3'd0; - end - else if(cnt_i2c_clk == 2'd3)begin - cnt_bit <= cnt_bit + 1'd1; - end - else begin - cnt_bit <= cnt_bit; + skip_en <= 1'b0; end end - ACK_1: begin - cnt_i2c_clk <= cnt_i2c_clk + 1'd1; - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd3))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; + ACK_1, ACK_2, ACK_3, NACK: + begin + if((ack == 1'b1) && (cnt_i2c_clk == 2'd2))begin + skip_en <= 1'b1; end else begin - skip_en_5 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd6))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; - end - end - DEVICE_ADDR:begin - cnt_i2c_clk <= cnt_i2c_clk + 1'b1; - if((cnt_i2c_clk == 2'd3) && (cnt_bit == 3'd7))begin - cnt_bit <= 3'd0; - end - else if(cnt_i2c_clk == 2'd3)begin - cnt_bit <= cnt_bit + 1'b1; + skip_en <= 1'b0; end - else begin - cnt_bit <= cnt_bit; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - end - ACK_2: begin - cnt_i2c_clk <= cnt_i2c_clk + 1; - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end end DATA: begin - cnt_i2c_clk <= cnt_i2c_clk + 1'b1; - if((cnt_i2c_clk == 2'd3) && (cnt_bit == 3'd7))begin - cnt_bit <= 3'd0; - end - else if(cnt_i2c_clk == 2'd3)begin - cnt_bit <= cnt_bit + 1'b1; - end - else begin - cnt_bit <= cnt_bit; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd1))begin - skip_en_2 <= 1'b1; + if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7))begin + skip_en <= 1'b1; end else begin - skip_en_2 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd3) && (recv_data == 8'h20))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd6))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; + skip_en <= 1'b0; end if((cnt_i2c_clk == 2'd2) && (cnt_bit == 3'd7) && (step == 3'd3) && (recv_data != 8'h20))begin begin @@ -513,93 +378,12 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin end end end - NACK: begin - cnt_i2c_clk <= cnt_i2c_clk + 1; - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd3))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd6))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; - end - end - ACK_3: begin - cnt_i2c_clk <= cnt_i2c_clk + 1; - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((ack == 1'b1) && (cnt_i2c_clk == 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - end - WAIT: begin - if(cnt_wait == MAX - 1'd1)begin - cnt_wait <= 10'd0; - end - else begin - cnt_wait <= cnt_wait + 1'd1; - end - if((cnt_wait == MAX - 2'd2) && (step == 3'd0))begin - skip_en_1 <= 1'b1; - end - else begin - skip_en_1 <= 1'b0; - end - end STOP: begin - cnt_i2c_clk <= cnt_i2c_clk + 1'd1; - if((cnt_i2c_clk == 2'd2) && (step == 3'd0))begin - skip_en_1 <= 1'b1; + if((cnt_i2c_clk == 2'd2))begin + skip_en <= 1'b1; end else begin - skip_en_1 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd1))begin - skip_en_2 <= 1'b1; - end - else begin - skip_en_2 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd2))begin - skip_en_3 <= 1'b1; - end - else begin - skip_en_3 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd3))begin - skip_en_4 <= 1'b1; - end - else begin - skip_en_4 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd4))begin - skip_en_5 <= 1'b1; - end - else begin - skip_en_5 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd5))begin - skip_en_6 <= 1'b1; - end - else begin - skip_en_6 <= 1'b0; - end - if((cnt_i2c_clk == 2'd2) && (step == 3'd6))begin - skip_en_7 <= 1'b1; - end - else begin - skip_en_7 <= 1'b0; + skip_en <= 1'b0; end if(cnt_i2c_clk == 2'd2)begin i2c_end <= 1'b1; @@ -619,17 +403,9 @@ always @(posedge i2c_clk or negedge sys_rst_n)begin end default: begin cnt_wait <= 10'd0; - skip_en_1 <= 1'b0; - skip_en_2 <= 1'b0; - skip_en_3 <= 1'b0; - skip_en_4 <= 1'b0; - skip_en_5 <= 1'b0; - skip_en_6 <= 1'b0; - skip_en_7 <= 1'b0; + skip_en <= 1'b0; err_en <= 1'b0; step <= step; - cnt_i2c_clk <= 2'd0; - cnt_bit <= 3'd0; i2c_end <= 1'b0; end endcase @@ -662,51 +438,7 @@ always @(*)begin default: ack = 1'b0; endcase end -//step -always @(*)begin - case(step) - 3'd0: begin - slave_addr = {SLAVE_ID, 1'b0}; - device_addr = 8'h0; - wr_data = 8'h0; - end - 3'd1: begin - slave_addr = {SLAVE_ID, 1'b0}; - device_addr= {8'hef}; - wr_data = {8'h00}; - end - 3'd2: begin - slave_addr = {SLAVE_ID, 1'b0}; - device_addr= {8'h00}; - wr_data = {8'h00}; - end - 3'd3: begin - slave_addr = {SLAVE_ID, 1'b1};//读取 - device_addr= {8'h00}; - wr_data = {8'h00}; - end - 3'd4: begin - slave_addr = {SLAVE_ID, 1'b0}; - device_addr= cfg_data[15: 8]; - wr_data = cfg_data[7: 0]; - end - 3'd5: begin - slave_addr = {SLAVE_ID, 1'b0};//配置 - device_addr= 8'h43; - wr_data = 8'h00; - end - 3'd6: begin - slave_addr = {SLAVE_ID, 1'b1};//读取 - device_addr= 8'h43; - wr_data = 8'h00; - end - default:begin - slave_addr = 8'h0; - device_addr = 8'h0; - wr_data = 8'h0; - end - endcase -end + //i2c_scl always @(*)begin case(state_c) @@ -721,7 +453,7 @@ end //i2c_sda always @(*)begin case(state_c) - IDLE: i2c_sda = 1'b1; + IDLE, NACK: i2c_sda = 1'b1; START: i2c_sda = (cnt_i2c_clk > 2'd1) ? 1'b0 : 1'b1; SLAVE_ADDR: i2c_sda = slave_addr[7 - cnt_bit]; DEVICE_ADDR:i2c_sda = device_addr[7 - cnt_bit]; @@ -731,10 +463,8 @@ always @(*)begin else begin i2c_sda = wr_data[7 - cnt_bit]; end - ACK_1, ACK_2, ACK_3: + ACK_1, ACK_2, ACK_3, WAIT: i2c_sda = 1'b0; - WAIT: i2c_sda = 1'b0; - NACK: i2c_sda = 1'b1;//主机给从机发1 STOP: i2c_sda = (cnt_i2c_clk >= 2'd2) ? 1'b1 : 1'b0; default: i2c_sda = 1'b1; endcase