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16 lines
325 B
Verilog

`define SYS_FRQ 50_000_000
`define BAUD_115200
//9600、19200、38400、57600以及115200
`ifdef BAUD_9600
`define MAX 9600
`elsif BAUD_19200
`define MAX 19200
`elsif BAUD_38400
`define MAX 38400
`elsif BAUD_57600
`define MAX 57600
`elsif BAUD_115200
`define MAX 115200
`else
`define MAX 115200
`endif