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36 lines
783 B
Coq
36 lines
783 B
Coq
7 months ago
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module key_debounce(
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input wire sys_clk ,
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input wire sys_rst_n ,
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input wire key_in ,
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output reg key_out
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);
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parameter MAX = 20'd999_999;
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reg [19: 0] cnt_20ms;
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always @(posedge sys_clk or negedge sys_rst_n) begin
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if(!sys_rst_n)begin
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cnt_20ms <= 20'd0;
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end
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else if(key_in == 1'b1)begin
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cnt_20ms <= 20'd0;
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end
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else if((cnt_20ms == MAX) && (key_in == 1'b0))begin
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cnt_20ms <= cnt_20ms;
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end
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else begin
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cnt_20ms <= cnt_20ms + 1'd1;
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end
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end
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always @(posedge sys_clk or negedge sys_rst_n)begin
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if(!sys_rst_n)begin
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key_out <= 1'b0;
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end
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else if(cnt_20ms == MAX - 1'd1)begin
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key_out <= 1'b1;
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end
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else begin
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key_out <= 1'b0;
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end
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end
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endmodule
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