commit 0ef63c4c6a7d22bcd5c1d39e66ad1e2c1a2f164a Author: lincaigui <18166451309@163.com> Date: Tue Apr 23 13:49:31 2024 +0800 finish diff --git a/readme.md b/readme.md new file mode 100644 index 0000000..6a52041 --- /dev/null +++ b/readme.md @@ -0,0 +1,2 @@ +## FPGA按键消抖 +### 普通按键消抖 \ No newline at end of file diff --git a/rtl/key_ctrl.v b/rtl/key_ctrl.v new file mode 100644 index 0000000..7a990ab --- /dev/null +++ b/rtl/key_ctrl.v @@ -0,0 +1,19 @@ +module key_ctrl( + input wire sys_clk , + input wire sys_rst_n , + input wire key , + + output reg led +); +always @(posedge sys_clk or negedge sys_rst_n)begin + if(!sys_rst_n)begin + led <= 1'b0; + end + else if(key == 1'b1)begin + led <= ~led; + end + else begin + led <= led; + end +end +endmodule \ No newline at end of file diff --git a/rtl/key_debounce.v b/rtl/key_debounce.v new file mode 100644 index 0000000..dbe750e --- /dev/null +++ b/rtl/key_debounce.v @@ -0,0 +1,36 @@ +module key_debounce( + input wire sys_clk , + input wire sys_rst_n , + input wire key_in , + + output reg key_out +); +parameter MAX = 20'd999_999; +reg [19: 0] cnt_20ms; +always @(posedge sys_clk or negedge sys_rst_n) begin + if(!sys_rst_n)begin + cnt_20ms <= 20'd0; + end + else if(key_in == 1'b1)begin + cnt_20ms <= 20'd0; + end + else if((cnt_20ms == MAX) && (key_in == 1'b0))begin + cnt_20ms <= cnt_20ms; + end + else begin + cnt_20ms <= cnt_20ms + 1'd1; + end +end + +always @(posedge sys_clk or negedge sys_rst_n)begin + if(!sys_rst_n)begin + key_out <= 1'b0; + end + else if(cnt_20ms == MAX - 1'd1)begin + key_out <= 1'b1; + end + else begin + key_out <= 1'b0; + end +end +endmodule \ No newline at end of file diff --git a/rtl/top.v b/rtl/top.v new file mode 100644 index 0000000..5d73723 --- /dev/null +++ b/rtl/top.v @@ -0,0 +1,24 @@ +module top( + input wire sys_clk , + input wire sys_rst_n, + input wire key_in , + + output wire led +); +wire key_out; +key_debounce key_debounce_inst( +.sys_clk (sys_clk), +.sys_rst_n (sys_rst_n), +.key_in (key_in), + +.key_out (key_out) +); + +key_ctrl key_ctrl_inst( +.sys_clk (sys_clk), +.sys_rst_n (sys_rst_n), +.key (key_out), + +.led (led) +); +endmodule \ No newline at end of file diff --git a/tcl/C4_pin.tcl b/tcl/C4_pin.tcl new file mode 100644 index 0000000..92cfeee --- /dev/null +++ b/tcl/C4_pin.tcl @@ -0,0 +1,114 @@ +#引脚参数导入脚本 +#时钟、复位 +set_location_assignment PIN_E1 -to sys_clk +set_location_assignment PIN_E15 -to sys_rst_n + +#UART +#set_location_assignment PIN_M2 -to uart_rx +#set_location_assignment PIN_G1 -to uart_tx + +#LED +#set_location_assignment PIN_D16 -to led[3] +#set_location_assignment PIN_F15 -to led[2] +#set_location_assignment PIN_F16 -to led[1] +set_location_assignment PIN_G15 -to led + +#独立按键 +# set_location_assignment PIN_M15 -to key_in[2] +# set_location_assignment PIN_M16 -to key_in[1] +set_location_assignment PIN_E16 -to key_in + +#数码管选段 +# set_location_assignment PIN_B7 -to seg_led[0] +# set_location_assignment PIN_A8 -to seg_led[1] +# set_location_assignment PIN_A6 -to seg_led[2] +# set_location_assignment PIN_B5 -to seg_led[3] +# set_location_assignment PIN_B6 -to seg_led[4] +# set_location_assignment PIN_A7 -to seg_led[5] +# set_location_assignment PIN_B8 -to seg_led[6] +# set_location_assignment PIN_A5 -to seg_led[7] + +#数码管片选w· +# set_location_assignment PIN_A4 -to sel_led[0] +# set_location_assignment PIN_B4 -to sel_led[1] +# set_location_assignment PIN_A3 -to sel_led[2] +# set_location_assignment PIN_B3 -to sel_led[3] +# set_location_assignment PIN_A2 -to sel_led[4] +# set_location_assignment PIN_B1 -to sel_led[5] + +#ds18b20 +# set_location_assignment PIN_E6 -to dq + +#蜂鸣器 +#set_location_assignment PIN_J1 -to buzzer + +#SDRAM + #地址 +#set_location_assignment PIN_T8 -to addr[0] +#set_location_assignment PIN_P9 -to addr[1] +#set_location_assignment PIN_T9 -to addr[2] +#set_location_assignment PIN_R9 -to addr[3] +#set_location_assignment PIN_L16 -to addr[4] +#set_location_assignment PIN_L15 -to addr[5] +#set_location_assignment PIN_N16 -to addr[6] +#set_location_assignment PIN_N15 -to addr[7] +#set_location_assignment PIN_P16 -to addr[8] +#set_location_assignment PIN_P15 -to addr[9] +#set_location_assignment PIN_R8 -to addr[10] +#set_location_assignment PIN_R16 -to addr[11] +#set_location_assignment PIN_T15 -to addr[12] + + #数据 +#set_location_assignment PIN_R5 -to dq[0] +#set_location_assignment PIN_T4 -to dq[1] +#set_location_assignment PIN_T3 -to dq[2] +#set_location_assignment PIN_R3 -to dq[3] +#set_location_assignment PIN_T2 -to dq[4] +#set_location_assignment PIN_R1 -to dq[5] +#set_location_assignment PIN_P2 -to dq[6] +#set_location_assignment PIN_P1 -to dq[7] +#set_location_assignment PIN_R13 -to dq[8] +#set_location_assignment PIN_T13 -to dq[9] +#set_location_assignment PIN_R12 -to dq[10] +#set_location_assignment PIN_T12 -to dq[11] +#set_location_assignment PIN_T10 -to dq[12] +#set_location_assignment PIN_R10 -to dq[13] +#set_location_assignment PIN_T11 -to dq[14] +#set_location_assignment PIN_R11 -to dq[15] + + #bank +#set_location_assignment PIN_R7 -to bank[0] +#set_location_assignment PIN_T7 -to bank[1] + + #dqm +#set_location_assignment PIN_N2 -to dqm[0] +#set_location_assignment PIN_T14 -to dqm[1] + + #时钟 +#set_location_assignment PIN_R4 -to sdram_clk + + #控制信号 +#set_location_assignment PIN_R14 -to cke +#set_location_assignment PIN_T6 -to cs_n +#set_location_assignment PIN_R6 -to ras_n +#set_location_assignment PIN_T5 -to cas_n +#set_location_assignment PIN_N1 -to we_n + + +#flash +#set_location_assignment PIN_H2 -to miso +#set_location_assignment PIN_C1 -to mosi +#set_location_assignment PIN_H1 -to sclk +#set_location_assignment PIN_D2 -to cs_n + +#EEPROM +#set_location_assignment PIN_L2 -to sda +#set_location_assignment PIN_L1 -to sclk + +#VGA + +#摄像头 + + + +