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24 lines
405 B
Verilog

module top(
input wire sys_clk ,
input wire sys_rst_n,
input wire key_in ,
output wire led
);
wire key_out;
key_debounce key_debounce_inst(
.sys_clk (sys_clk),
.sys_rst_n (sys_rst_n),
.key_in (key_in),
.key_out (key_out)
);
key_ctrl key_ctrl_inst(
.sys_clk (sys_clk),
.sys_rst_n (sys_rst_n),
.key (key_out),
.led (led)
);
endmodule