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46 lines
1.3 KiB
Coq
46 lines
1.3 KiB
Coq
7 months ago
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module data_gen(
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input wire clk_25 ,
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input wire vga_rst_n ,
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input wire [9: 0] pixel_x ,
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input wire [9: 0] pixel_y ,
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output reg [15: 0] rgb_data
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);
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wire [9: 0] char_x;
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wire [9: 0] char_y;
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wire [255: 0] data;
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wire charx_vld;
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wire chary_vld;
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//字符区域
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parameter WIDTH = 10'd8,
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HEIGHT = 10'd16,
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CHAR_X = 10'd190,
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CHAR_Y = 10'd200;
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//字符显示颜色
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parameter BLACK = 16'h0000, //黑色
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WHITE = 16'hFFFF; //白色
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assign charx_vld = ((pixel_x >= CHAR_X) && (pixel_x < WIDTH + CHAR_X)
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&&(pixel_y >= CHAR_Y) && (pixel_y < CHAR_Y + HEIGHT));
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assign chary_vld = ((pixel_x >= CHAR_X) && (pixel_x < WIDTH + CHAR_X)
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&&(pixel_y >= CHAR_Y) && (pixel_y < CHAR_Y + HEIGHT));
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assign char_x = (charx_vld == 1'b1) ? (pixel_x - CHAR_X):10'd0;
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assign char_y = (chary_vld == 1'b1) ? (pixel_y - CHAR_Y):10'd0;
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always @(posedge clk_25 or negedge vga_rst_n) begin
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if(!vga_rst_n)begin
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rgb_data <= BLACK;
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end
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else if((charx_vld == 1'b1) && (chary_vld == 1'b1) && (data[char_x] == 1'b1))begin
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rgb_data <= WHITE;
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end
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else begin
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rgb_data <= BLACK;
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end
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end
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rom rom_inst (
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.aclr ( ~vga_rst_n ),
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.address ( char_y ),
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.clock ( clk_25 ),
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.q ( data )
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);
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endmodule
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