module data_gen(
    input  wire             clk_25      ,
    input  wire             vga_rst_n   ,
    input  wire [9: 0]      pixel_x     ,
    input  wire [9: 0]      pixel_y     ,

    output reg  [15: 0]     rgb_data
);
wire [9: 0] char_x;
wire [9: 0] char_y;
wire [255: 0] data;
wire  charx_vld;
wire  chary_vld;
//字符区域
parameter  WIDTH  = 10'd8,
           HEIGHT = 10'd16,
           CHAR_X = 10'd190,
           CHAR_Y = 10'd200;
//字符显示颜色
parameter BLACK = 16'h0000, //黑色
          WHITE = 16'hFFFF; //白色
assign charx_vld = ((pixel_x >= CHAR_X) && (pixel_x < WIDTH + CHAR_X) 
              &&(pixel_y >= CHAR_Y) && (pixel_y < CHAR_Y + HEIGHT));
              
assign chary_vld = ((pixel_x >= CHAR_X) && (pixel_x < WIDTH + CHAR_X) 
              &&(pixel_y >= CHAR_Y) && (pixel_y < CHAR_Y + HEIGHT));  
assign char_x = (charx_vld == 1'b1) ? (pixel_x - CHAR_X):10'd0;
assign char_y = (chary_vld == 1'b1) ? (pixel_y - CHAR_Y):10'd0;
always @(posedge clk_25 or negedge vga_rst_n) begin
    if(!vga_rst_n)begin
        rgb_data <= BLACK;
    end 
    else if((charx_vld == 1'b1) && (chary_vld == 1'b1) && (data[char_x] == 1'b1))begin
        rgb_data <= WHITE;
    end 
    else begin
        rgb_data <= BLACK;
    end 
end
rom	rom_inst (
	.aclr ( ~vga_rst_n ),
	.address ( char_y ),
	.clock ( clk_25 ),
	.q ( data )
	);
endmodule