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29 lines
520 B
Verilog
29 lines
520 B
Verilog
module ws2812_top(
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input wire sys_clk ,
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input wire sys_rst_n ,
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output wire dout
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);
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wire bit ;
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wire [4: 0] cnt_bit;
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wire [6: 0] cnt_led;
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wire [1: 0] frame ;
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ws2812_ctrl ws2812_ctrl_inst(
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.sys_clk (sys_clk),
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.sys_rst_n (sys_rst_n),
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.bit (bit),
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.dout (dout),
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.cnt_bit (cnt_bit),
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.cnt_led (cnt_led),
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.frame (frame)
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);
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data_cfg data_cfg_inst(
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.cnt_bit (cnt_bit),
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.cnt_led (cnt_led),
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.frame (frame),
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.bit (bit)
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);
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endmodule
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