You cannot select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
27 lines
457 B
Verilog
27 lines
457 B
Verilog
module ws2812_top(
|
|
input wire sys_clk ,
|
|
input wire sys_rst_n ,
|
|
|
|
output wire dout
|
|
);
|
|
wire bit ;
|
|
wire [4: 0] cnt_bit;
|
|
wire [6: 0] cnt_led;
|
|
|
|
ws2812_ctrl ws2812_ctrl_inst(
|
|
.sys_clk (sys_clk),
|
|
.sys_rst_n (sys_rst_n),
|
|
.bit (bit),
|
|
|
|
.dout (dout),
|
|
.cnt_bit (cnt_bit),
|
|
.cnt_led (cnt_led)
|
|
);
|
|
|
|
data_cfg data_cfg_inst(
|
|
.cnt_bit (cnt_bit),
|
|
.cnt_led (cnt_led),
|
|
|
|
.bit (bit)
|
|
);
|
|
endmodule
|